1. Field of the Invention
The present invention relates to a heteroepitaxial growth method, and more particularly, to a method of growing a III-V group compound semiconductor crystalline thin film of, for example, GaAs and the like, on a silicon substrate.
2. Description of the Related Art
The heteroepitaxial growth of a III-V group compound semiconductor crystalline thin film of, for example, GaAs and the like, on a silicon (Si) substrate is conventionally carried out by a Metalorganic Chemical Vapor Deposition (MOCVD) process or a Molecular Beam Epitaxy (MBE) process.
The crystal lattice constants of Si and GaAs are 5.43 .ANG. and 5.65 .ANG., respectively, and the thermal expansion coefficients thereof are 2.6.times.10.sup.-6 /.degree.C. and 5.9.times.10.sup.-6 /.degree.C., respectively.
Accordingly, since the crystal lattice constants and the thermal expansion coefficients of Si and GaAs are different, and particularly, since the thermal expansion coefficients of Si and GaAs are very different, when a GaAs layer is formed on a Si substrate by the MOCVD process, the GaAs is formed thereon in a polycrystalline state. Therefore, after an amorphous GaAs is grown on a Si substrate to a thickness of 100 to 200 .ANG. at a temperature of about 450.degree. C. to form an amorphous GaAs layer, crystalline GaAs is grown to a thickness of 3 to 5 .mu.m at a temperature of 700 to 750.degree. C., whereby a GaAs single crystalline thin film is obtained by a two-step process in which the mismatching of the lattice constant of Si and GaAs is relaxed by the occurrence of defects at the interface between the Si and GaAs.
Accordingly, even if GaAs is grown on a Si substrate by the above-mentioned two-step growth process, when the temperature of the substrate is changed to a room temperature after the growth of GaAs, significant warping of the substrate occurs and the GaAs surface becomes concave, as shown in Prior Art FIG. 1.
When GaAs is grown to a thickness of 3 .mu.m or more, a tension stress stronger than 1.times.10.sup.9 dyn/cm.sup.2 or more is generated, and therefore, when the substrate is subjected to a heat treatment after the GaAs growth, lattice defects such as dislocation and the like are formed therein to generate cracks 10, and thus, in practice the formation of a GaAs layer on a Si substrate is not considered viable. In Prior Art FIG. 1, reference numerals 1, 2 and 3, denote a silicon (Si) substrate, an amorphous GaAs layer and a GaAs crystalline layer, respectively.